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  "meta": {
    "date": "2026-10-15",
    "gpu": "NVIDIA Blackwell Ultra / GB300 NVL72",
    "shape": {
      "T": 2048,
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    "timingNote": "CUDA graphs; maximum rank in each window, then median of five windows of 30 iterations. Forward, backward, and combined medians are reduced separately.",
    "bandwidthNote": "NVLink TX/RX are hardware counters from a separate collection of at least one second. HBM is an analytical useful-byte estimate, not a DRAM-counter measurement.",
    "placementNote": "Four separate allocations. EP64 training ran at a different site from EP32. Some allocations shared an NVLink fabric and overlapped in lifetime; timing-window overlap is unconfirmed. These observations do not establish uncontended peak performance.",
    "memoryNote": "One layer; training has one activation slot and capacity/scratch factors 8. VMM is off and no training layer triggered capacity recompute. Arena budgets and PyTorch allocation peaks are separate accounting views.",
    "source": "Author-supplied report_isolated_v6/report.html and cached measurements",
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