cuda_sys

Function cudaDeviceGetAttribute

Source 
pub unsafe extern "C" fn cudaDeviceGetAttribute(
    value: *mut c_int,
    attr: cudaDeviceAttr,
    device: c_int,
) -> cudaError_t
Expand description

\brief Returns information about the device

Returns in \p *value the integer value of the attribute \p attr on device \p device. The supported attributes are:

  • ::cudaDevAttrMaxThreadsPerBlock: Maximum number of threads per block
  • ::cudaDevAttrMaxBlockDimX: Maximum x-dimension of a block
  • ::cudaDevAttrMaxBlockDimY: Maximum y-dimension of a block
  • ::cudaDevAttrMaxBlockDimZ: Maximum z-dimension of a block
  • ::cudaDevAttrMaxGridDimX: Maximum x-dimension of a grid
  • ::cudaDevAttrMaxGridDimY: Maximum y-dimension of a grid
  • ::cudaDevAttrMaxGridDimZ: Maximum z-dimension of a grid
  • ::cudaDevAttrMaxSharedMemoryPerBlock: Maximum amount of shared memory available to a thread block in bytes
  • ::cudaDevAttrTotalConstantMemory: Memory available on device for constant variables in a CUDA C kernel in bytes
  • ::cudaDevAttrWarpSize: Warp size in threads
  • ::cudaDevAttrMaxPitch: Maximum pitch in bytes allowed by the memory copy functions that involve memory regions allocated through ::cudaMallocPitch()
  • ::cudaDevAttrMaxTexture1DWidth: Maximum 1D texture width
  • ::cudaDevAttrMaxTexture1DLinearWidth: Maximum width for a 1D texture bound to linear memory
  • ::cudaDevAttrMaxTexture1DMipmappedWidth: Maximum mipmapped 1D texture width
  • ::cudaDevAttrMaxTexture2DWidth: Maximum 2D texture width
  • ::cudaDevAttrMaxTexture2DHeight: Maximum 2D texture height
  • ::cudaDevAttrMaxTexture2DLinearWidth: Maximum width for a 2D texture bound to linear memory
  • ::cudaDevAttrMaxTexture2DLinearHeight: Maximum height for a 2D texture bound to linear memory
  • ::cudaDevAttrMaxTexture2DLinearPitch: Maximum pitch in bytes for a 2D texture bound to linear memory
  • ::cudaDevAttrMaxTexture2DMipmappedWidth: Maximum mipmapped 2D texture width
  • ::cudaDevAttrMaxTexture2DMipmappedHeight: Maximum mipmapped 2D texture height
  • ::cudaDevAttrMaxTexture3DWidth: Maximum 3D texture width
  • ::cudaDevAttrMaxTexture3DHeight: Maximum 3D texture height
  • ::cudaDevAttrMaxTexture3DDepth: Maximum 3D texture depth
  • ::cudaDevAttrMaxTexture3DWidthAlt: Alternate maximum 3D texture width, 0 if no alternate maximum 3D texture size is supported
  • ::cudaDevAttrMaxTexture3DHeightAlt: Alternate maximum 3D texture height, 0 if no alternate maximum 3D texture size is supported
  • ::cudaDevAttrMaxTexture3DDepthAlt: Alternate maximum 3D texture depth, 0 if no alternate maximum 3D texture size is supported
  • ::cudaDevAttrMaxTextureCubemapWidth: Maximum cubemap texture width or height
  • ::cudaDevAttrMaxTexture1DLayeredWidth: Maximum 1D layered texture width
  • ::cudaDevAttrMaxTexture1DLayeredLayers: Maximum layers in a 1D layered texture
  • ::cudaDevAttrMaxTexture2DLayeredWidth: Maximum 2D layered texture width
  • ::cudaDevAttrMaxTexture2DLayeredHeight: Maximum 2D layered texture height
  • ::cudaDevAttrMaxTexture2DLayeredLayers: Maximum layers in a 2D layered texture
  • ::cudaDevAttrMaxTextureCubemapLayeredWidth: Maximum cubemap layered texture width or height
  • ::cudaDevAttrMaxTextureCubemapLayeredLayers: Maximum layers in a cubemap layered texture
  • ::cudaDevAttrMaxSurface1DWidth: Maximum 1D surface width
  • ::cudaDevAttrMaxSurface2DWidth: Maximum 2D surface width
  • ::cudaDevAttrMaxSurface2DHeight: Maximum 2D surface height
  • ::cudaDevAttrMaxSurface3DWidth: Maximum 3D surface width
  • ::cudaDevAttrMaxSurface3DHeight: Maximum 3D surface height
  • ::cudaDevAttrMaxSurface3DDepth: Maximum 3D surface depth
  • ::cudaDevAttrMaxSurface1DLayeredWidth: Maximum 1D layered surface width
  • ::cudaDevAttrMaxSurface1DLayeredLayers: Maximum layers in a 1D layered surface
  • ::cudaDevAttrMaxSurface2DLayeredWidth: Maximum 2D layered surface width
  • ::cudaDevAttrMaxSurface2DLayeredHeight: Maximum 2D layered surface height
  • ::cudaDevAttrMaxSurface2DLayeredLayers: Maximum layers in a 2D layered surface
  • ::cudaDevAttrMaxSurfaceCubemapWidth: Maximum cubemap surface width
  • ::cudaDevAttrMaxSurfaceCubemapLayeredWidth: Maximum cubemap layered surface width
  • ::cudaDevAttrMaxSurfaceCubemapLayeredLayers: Maximum layers in a cubemap layered surface
  • ::cudaDevAttrMaxRegistersPerBlock: Maximum number of 32-bit registers available to a thread block
  • ::cudaDevAttrClockRate: Peak clock frequency in kilohertz
  • ::cudaDevAttrTextureAlignment: Alignment requirement; texture base addresses aligned to ::textureAlign bytes do not need an offset applied to texture fetches
  • ::cudaDevAttrTexturePitchAlignment: Pitch alignment requirement for 2D texture references bound to pitched memory
  • ::cudaDevAttrGpuOverlap: 1 if the device can concurrently copy memory between host and device while executing a kernel, or 0 if not
  • ::cudaDevAttrMultiProcessorCount: Number of multiprocessors on the device
  • ::cudaDevAttrKernelExecTimeout: 1 if there is a run time limit for kernels executed on the device, or 0 if not
  • ::cudaDevAttrIntegrated: 1 if the device is integrated with the memory subsystem, or 0 if not
  • ::cudaDevAttrCanMapHostMemory: 1 if the device can map host memory into the CUDA address space, or 0 if not
  • ::cudaDevAttrComputeMode: Compute mode is the compute mode that the device is currently in. Available modes are as follows:
    • ::cudaComputeModeDefault: Default mode - Device is not restricted and multiple threads can use ::cudaSetDevice() with this device.
    • ::cudaComputeModeProhibited: Compute-prohibited mode - No threads can use ::cudaSetDevice() with this device.
    • ::cudaComputeModeExclusiveProcess: Compute-exclusive-process mode - Many threads in one process will be able to use ::cudaSetDevice() with this device.
  • ::cudaDevAttrConcurrentKernels: 1 if the device supports executing multiple kernels within the same context simultaneously, or 0 if not. It is not guaranteed that multiple kernels will be resident on the device concurrently so this feature should not be relied upon for correctness.
  • ::cudaDevAttrEccEnabled: 1 if error correction is enabled on the device, 0 if error correction is disabled or not supported by the device
  • ::cudaDevAttrPciBusId: PCI bus identifier of the device
  • ::cudaDevAttrPciDeviceId: PCI device (also known as slot) identifier of the device
  • ::cudaDevAttrTccDriver: 1 if the device is using a TCC driver. TCC is only available on Tesla hardware running Windows Vista or later.
  • ::cudaDevAttrMemoryClockRate: Peak memory clock frequency in kilohertz
  • ::cudaDevAttrGlobalMemoryBusWidth: Global memory bus width in bits
  • ::cudaDevAttrL2CacheSize: Size of L2 cache in bytes. 0 if the device doesn’t have L2 cache.
  • ::cudaDevAttrMaxThreadsPerMultiProcessor: Maximum resident threads per multiprocessor
  • ::cudaDevAttrUnifiedAddressing: 1 if the device shares a unified address space with the host, or 0 if not
  • ::cudaDevAttrComputeCapabilityMajor: Major compute capability version number
  • ::cudaDevAttrComputeCapabilityMinor: Minor compute capability version number
  • ::cudaDevAttrStreamPrioritiesSupported: 1 if the device supports stream priorities, or 0 if not
  • ::cudaDevAttrGlobalL1CacheSupported: 1 if device supports caching globals in L1 cache, 0 if not
  • ::cudaDevAttrLocalL1CacheSupported: 1 if device supports caching locals in L1 cache, 0 if not
  • ::cudaDevAttrMaxSharedMemoryPerMultiprocessor: Maximum amount of shared memory available to a multiprocessor in bytes; this amount is shared by all thread blocks simultaneously resident on a multiprocessor
  • ::cudaDevAttrMaxRegistersPerMultiprocessor: Maximum number of 32-bit registers available to a multiprocessor; this number is shared by all thread blocks simultaneously resident on a multiprocessor
  • ::cudaDevAttrManagedMemory: 1 if device supports allocating managed memory, 0 if not
  • ::cudaDevAttrIsMultiGpuBoard: 1 if device is on a multi-GPU board, 0 if not
  • ::cudaDevAttrMultiGpuBoardGroupID: Unique identifier for a group of devices on the same multi-GPU board
  • ::cudaDevAttrHostNativeAtomicSupported: 1 if the link between the device and the host supports native atomic operations
  • ::cudaDevAttrSingleToDoublePrecisionPerfRatio: Ratio of single precision performance (in floating-point operations per second) to double precision performance
  • ::cudaDevAttrPageableMemoryAccess: 1 if the device supports coherently accessing pageable memory without calling cudaHostRegister on it, and 0 otherwise
  • ::cudaDevAttrConcurrentManagedAccess: 1 if the device can coherently access managed memory concurrently with the CPU, and 0 otherwise
  • ::cudaDevAttrComputePreemptionSupported: 1 if the device supports Compute Preemption, 0 if not
  • ::cudaDevAttrCanUseHostPointerForRegisteredMem: 1 if the device can access host registered memory at the same virtual address as the CPU, and 0 otherwise
  • ::cudaDevAttrCooperativeLaunch: 1 if the device supports launching cooperative kernels via ::cudaLaunchCooperativeKernel, and 0 otherwise
  • ::cudaDevAttrCooperativeMultiDeviceLaunch: 1 if the device supports launching cooperative kernels via ::cudaLaunchCooperativeKernelMultiDevice, and 0 otherwise
  • ::cudaDevAttrCanFlushRemoteWrites: 1 if the device supports flushing of outstanding remote writes, and 0 otherwise
  • ::cudaDevAttrHostRegisterSupported: 1 if the device supports host memory registration via ::cudaHostRegister, and 0 otherwise
  • ::cudaDevAttrPageableMemoryAccessUsesHostPageTables: 1 if the device accesses pageable memory via the host’s page tables, and 0 otherwise
  • ::cudaDevAttrDirectManagedMemAccessFromHost: 1 if the host can directly access managed memory on the device without migration, and 0 otherwise
  • ::cudaDevAttrMaxSharedMemoryPerBlockOptin: Maximum per block shared memory size on the device. This value can be opted into when using ::cudaFuncSetAttribute
  • ::cudaDevAttrMaxBlocksPerMultiprocessor: Maximum number of thread blocks that can reside on a multiprocessor
  • ::cudaDevAttrMaxPersistingL2CacheSize: Maximum L2 persisting lines capacity setting in bytes
  • ::cudaDevAttrMaxAccessPolicyWindowSize: Maximum value of cudaAccessPolicyWindow::num_bytes
  • ::cudaDevAttrReservedSharedMemoryPerBlock: Shared memory reserved by CUDA driver per block in bytes
  • ::cudaDevAttrSparseCudaArraySupported: 1 if the device supports sparse CUDA arrays and sparse CUDA mipmapped arrays.
  • ::cudaDevAttrHostRegisterReadOnlySupported: Device supports using the ::cudaHostRegister flag cudaHostRegisterReadOnly to register memory that must be mapped as read-only to the GPU
  • ::cudaDevAttrMemoryPoolsSupported: 1 if the device supports using the cudaMallocAsync and cudaMemPool family of APIs, and 0 otherwise
  • ::cudaDevAttrGPUDirectRDMASupported: 1 if the device supports GPUDirect RDMA APIs, and 0 otherwise
  • ::cudaDevAttrGPUDirectRDMAFlushWritesOptions: bitmask to be interpreted according to the ::cudaFlushGPUDirectRDMAWritesOptions enum
  • ::cudaDevAttrGPUDirectRDMAWritesOrdering: see the ::cudaGPUDirectRDMAWritesOrdering enum for numerical values
  • ::cudaDevAttrMemoryPoolSupportedHandleTypes: Bitmask of handle types supported with mempool based IPC
  • ::cudaDevAttrDeferredMappingCudaArraySupported : 1 if the device supports deferred mapping CUDA arrays and CUDA mipmapped arrays.
  • ::cudaDevAttrIpcEventSupport: 1 if the device supports IPC Events.
  • ::cudaDevAttrNumaConfig: NUMA configuration of a device: value is of type ::cudaDeviceNumaConfig enum
  • ::cudaDevAttrNumaId: NUMA node ID of the GPU memory

\param value - Returned device attribute value \param attr - Device attribute to query \param device - Device number to query

\return ::cudaSuccess, ::cudaErrorInvalidDevice, ::cudaErrorInvalidValue \notefnerr \note_init_rt \note_callback

\sa ::cudaGetDeviceCount, ::cudaGetDevice, ::cudaSetDevice, ::cudaChooseDevice, ::cudaGetDeviceProperties, ::cudaInitDevice, ::cuDeviceGetAttribute